shared traits for architecture definitions, instruction decoders, and related interfaces for instruction decoders from the yaxpeax project.
there are numerous architectures for which decoders are implemented, at varying levels of completion. now and in the future, they will be enumerated here:
| symbol | meaning | | ------ | ------- | | 🥳 | complete, reliable | | ⚠️| "complete", likely has gaps | | 🚧 | incomplete | | ❓ | unimplemented |
| architecture | library | decode | tests | benchmarks | note |
| ------------ | ------- | ------ | ----- | ---------- | ---- |
| x86_64
| yaxpeax-x86 | 🥳 | 🥳 | 🥳 | |
| x86:32
| yaxpeax-x86 | 🥳 | 🥳 | ❓ | sse and sse2 support cannot be disabled |
| x86:16
| yaxpeax-x86 | 🥳 | 🥳 | ❓ | instructions above the 8086 or 286 cannot be disabled |
| ia64
| yaxpeax-ia64 | 🥳 | ⚠️ | ❓ | lack of a good oracle has complicated testing |
| armv7
| yaxpeax-arm | 🚧 | 🚧 | ❓ | NEON is not yet supported |
| armv8
| yaxpeax-arm | 🚧 | 🚧 | ❓ | a32 decoding is not yet supported, NEON is not supported |
| m16c
| yaxpeax-m16c | ⚠️ | 🚧 | ❓ | |
| mips
| yaxpeax-mips | 🚧 | 🚧 | ❓ | |
| msp430
| yaxpeax-msp430 | 🚧 | 🚧 | ❓ | |
| pic17
| yaxpeax-pic17 | 🚧 | 🚧 | ❓ | |
| pic18
| yaxpeax-pic18 | 🚧 | 🚧 | ❓ | |
| pic24
| yaxpeax-pic24 | ❓ | ❓ | ❓ | exists, but only decodes NOP
|
| sm83
| yaxpeax-sm83 | 🥳 | 🚧 | ❓ | |
| avr
| yaxpeax-avr | 🥳 | 🚧 | ❓ | contributed by @the6p4c! |
| sh
/sh2
/j2
/sh3
/sh4
| yaxpeax-superh | 🥳 | 🚧 | ❓ | contributed by наб |
| MOS 6502
| yaxpeax-6502 | ⚠️ | ❓ | ❓ | contributed by @cr1901 |
| lc87
| yaxpeax-lc87 | 🥳 | ⚠️ | ❓ | |
yaxpeax-arch
defines a few typically-optional features that decoders can also implement, in addition to simple (bytes) -> instruction
decoding. these are not crate features, but yaxpeax-arch
trait impls or collections thereof.
description_spans
: implementation of AnnotatingDecoder
, to decode instructions with bit-level details of what incoming bitstreams mean.
contextualize
: implementation of ShowContextual
, to display instructions with user-defined information in place of default instruction data. typically expected to show label names instead of relative branch addresses. i do not recommend implementing this trait, it needs significant reconsideration.
| architecture | description_spans
| contextualize
|
| ------------ | ------------------- | --------------- |
| x86_64
| 🥳 | ❓ |
| ia64
| 🥳 | ❓ |
| msp430
| 🥳 | ❓ |
the canonical copy of yaxpeax-arch
is at https://git.iximeow.net/yaxpeax-arch.
yaxpeax-arch
is also mirrored on GitHub at https://www.github.com/iximeow/yaxpeax-arch.