Veryl
Veryl is a modern hardware description language.

Documentation quick links
Features
- Symplified syntax
- Based on SystemVerilog / Rust
- Transpiler to SystemVerilog
- Human readable output
- Interoperability with SystemVerilog
- Integrated Tools
- Semantic checker
- Source code formatter
- Language server
Installation
Usage
Reference
License
Licensed under either of
- Apache License, Version 2.0, (LICENSE-APACHE or http://www.apache.org/licenses/LICENSE-2.0)
- MIT license (LICENSE-MIT or http://opensource.org/licenses/MIT)
at your option.
Contribution
Unless you explicitly state otherwise, any contribution intentionally
submitted for inclusion in the work by you, as defined in the Apache-2.0
license, shall be dual licensed as above, without any additional terms or
conditions.