emei

The 峨眉 (EMei) JIT/AOT backend codegen framework.

Support Instructions

warning: only supported little ending byte array output.

risc-v

Please refer to the riscv arch manual.

x86_64

warning: unsupported x87 fpu float operator.

insts rule

inst dst, src=inst(src, dst)

insts

about headware inference

sse float instruction

sse simd instruction

Example

look src/lib.rs.