Embedded Rust access API for TI CC2650 microcontrollers.
This crate provides an autogenerated API interacting with the CC2650 and its peripherals. The API is generated using [svd2rust] via [dslite2svd].
To use, in your Cargo.toml:
toml
[dependencies]
cc2650 = "0.1"
The rt
feature is optional and brings in support for [cortex-m-rt]:
toml
[dependencies]
cc2650 = { version = "0.1", features = ["rt"] }
See my blog post about creating this crate.
Note: The following example assumes you are using [Rust 2018], I.e. Rust >= 1.31.
```rust use cc2650;
fn init() { let device_peripherals = cc2650::Peripherals::take().unwrap();
// Configure GPIO pins for output, maximum strength
device_peripherals.IOC
.iocfg10
.modify(|_r, w| w.port_id().gpio().ie().clear_bit().iostr().max());
device_peripherals.IOC
.iocfg15
.modify(|_r, w| w.port_id().gpio().ie().clear_bit().iostr().max());
// Enable the PERIPH power domain and wait for it to be powered up
device_peripherals.PRCM.pdctl0.modify(|_r, w| w.periph_on().set_bit());
loop {
if device_peripherals.PRCM.pdstat0.read().periph_on().bit_is_set() {
break;
}
}
// Enable the GPIO clock
device_peripherals.PRCM.gpioclkgr.write(|w| w.clk_en().set_bit());
// Load settings into CLKCTRL and wait for LOAD_DONE
device_peripherals.PRCM.clkloadctl.modify(|_r, w| w.load().set_bit());
loop {
if device_peripherals.PRCM.clkloadctl.read().load_done().bit_is_set() {
break;
}
}
// Enable outputs
device_peripherals.GPIO
.doe31_0
.modify(|_r, w| w.dio10().set_bit().dio15().set_bit());
} ```
Note: There are other devices in the CC26x0 family that may also work but these have not been tested.
This crate was generated from SVD files generated by [dslite2svd].
This project is dual licenced under: